Università degli Studi di Padova (UNIPD)

Funded in 1222, with approximately 60000 students, the University of Padova is one of the oldest in Italy.

The biggest square in Padova, Prato della Valle

Canaletto 1740

Canaletto today

The Department of Information Engineering (DEI) of the University of Padova is composed by approximately 100 Faculty and 200 PhD students and post-docs, carrying out research at the state of the art in the fields of

  • microelectronics and power electronics
  • automation and control theory
  • bioengineering
  • computer science
  • robotics
  • telecommunication and networking
  • quantum electronics and quantum communication
  • fiber optics and related applications

with a strong link to local and global industrial development centers.

The Microelectronics research group at DEI, University of Padova, funded in 1988, composed by 10 Faculty members + 1 technical engineer and 14 PhD students and post-docs, carries out research in the field of the characterization and reliability evaluation of Si and compound semiconductor devices, of the radiation hardness of devices, circuits and systems, on organic electronics, photovoltaics, biosensors and on analog and rf CMOS integrated circuits design. Research on the reliability physics of GaN electronics (HEMT for microwave and power applications) and optoelectronics (LED and lasers) started in 1999.

Accelerated testing system for GaN High Electron Mobility Transistors


Within PowerBase, the University of Padova will coordinate workpackage 6, "Reliability" and will:

  • carry out research on the physics of failure of GaN-on-Si power devices
  • develop TCAD and circuit-level models for the evaluation of trapping effects
  • develop tests in order to compare different material/processing/design options for the devices fabricated within the project
  • propose testing methods to evaluate the reliability of GaN transistors for power switching applications

Key Contribution:

The scientific goals of the University of Padova within Power base are: (i) understanding the interplay between trapping effects, leading to on-resistance dynamic increase, and properties of substrate and epitaxial layers or device processing; define models for parasitic effects, suitable for circuit simulation; propose changes in epitaxial structure, compensating profiles, device design, aimed at reducing trapping effects; (ii) identifying physical mechanisms affecting off-state leakage currents, model them and improve device structures; (iii) testing different device options developed within the project, identify physical failure mechanisms and derive reliability models.

The above listed tasks require a very wide spectrum of expertise from material science and epitaxial growth, to device design and simulation, device processing, reliability and failure analysis, and the commitment of foundries to explore alternative solutions and provide different process and material options. This can only be done within a wide European consortium, where all this specific know-how can be focused towards common objectives and harmonized.


Università degli Studi di Padova

Via Gradenigo 6/A
35131 Padova, Italy

Hot carrier characterization by electroluminescence;
high voltage semiconductor parameter analyzer; finite-element simulation of a GaN device

Failure analysis of GaN HEMT using electroluminescence;
Transmission Electron Micrographs identifying defects in the cross-section f AlGaN/GaN HEMTs